Silicon-Proven Timing Signoff Methodology Using Hazard-Free Robust Path Delay Tests

Ankit Shah, Raman Nayyar, Arani Sinha. Silicon-Proven Timing Signoff Methodology Using Hazard-Free Robust Path Delay Tests. IEEE Design & Test of Computers, 37(4):7-13, 2020. [doi]

@article{ShahNS20,
  title = {Silicon-Proven Timing Signoff Methodology Using Hazard-Free Robust Path Delay Tests},
  author = {Ankit Shah and Raman Nayyar and Arani Sinha},
  year = {2020},
  doi = {10.1109/MDAT.2020.2968253},
  url = {https://doi.org/10.1109/MDAT.2020.2968253},
  researchr = {https://researchr.org/publication/ShahNS20},
  cites = {0},
  citedby = {0},
  journal = {IEEE Design & Test of Computers},
  volume = {37},
  number = {4},
  pages = {7-13},
}