Novel high-speed reconfigurable FPGA architectures for EMD-based image steganography

K. Sathish Shet, A. R. Aswath, M. C. Hanumantharaju, Xiao Zhi Gao. Novel high-speed reconfigurable FPGA architectures for EMD-based image steganography. Multimedia Tools Appl., 78(13):18309-18338, 2019. [doi]

Abstract

Abstract is missing.