An integrated timing and dynamic supply noise verification for nano-meter CMOS SoC designs

Kenji Shimazaki, Mitsuya Fukazawa, Makoto Nagata, Shingo Miyahara, Masaaki Hirata, Kazuhiro Satoh, Hiroyuki Tsujikawa. An integrated timing and dynamic supply noise verification for nano-meter CMOS SoC designs. In Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, CICC 2005, DoubleTree Hotel, San Jose, California, USA, September 18-21, 2005. pages 31-34, IEEE, 2005. [doi]

Abstract

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