A 22nm 32Mb Embedded STT-MRAM Macro Achieving 5.9ns Random Read Access and 5.8MB/s Write Throughput at up to Tj of 150 °C

Takahiro Shimoi, Ken Matsubara, Tomoya Saito, Tomoya Ogawa, Yasuhiko Taito, Yoshinobu Kaneda, Masayuki Izuna, Koichi Takeda, Hidenori Mitani, Takashi Ito, Takashi Kono. A 22nm 32Mb Embedded STT-MRAM Macro Achieving 5.9ns Random Read Access and 5.8MB/s Write Throughput at up to Tj of 150 °C. In IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022. pages 134-135, IEEE, 2022. [doi]

Authors

Takahiro Shimoi

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Ken Matsubara

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Tomoya Saito

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Tomoya Ogawa

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Yasuhiko Taito

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Yoshinobu Kaneda

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Masayuki Izuna

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Koichi Takeda

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Hidenori Mitani

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Takashi Ito

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Takashi Kono

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