Takahiro Shimoi, Ken Matsubara, Tomoya Saito, Tomoya Ogawa, Yasuhiko Taito, Yoshinobu Kaneda, Masayuki Izuna, Koichi Takeda, Hidenori Mitani, Takashi Ito, Takashi Kono. A 22nm 32Mb Embedded STT-MRAM Macro Achieving 5.9ns Random Read Access and 5.8MB/s Write Throughput at up to Tj of 150 °C. In IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022. pages 134-135, IEEE, 2022. [doi]
@inproceedings{ShimoiMSOTKITMI22,
title = {A 22nm 32Mb Embedded STT-MRAM Macro Achieving 5.9ns Random Read Access and 5.8MB/s Write Throughput at up to Tj of 150 °C},
author = {Takahiro Shimoi and Ken Matsubara and Tomoya Saito and Tomoya Ogawa and Yasuhiko Taito and Yoshinobu Kaneda and Masayuki Izuna and Koichi Takeda and Hidenori Mitani and Takashi Ito and Takashi Kono},
year = {2022},
doi = {10.1109/VLSITechnologyandCir46769.2022.9830273},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830273},
researchr = {https://researchr.org/publication/ShimoiMSOTKITMI22},
cites = {0},
citedby = {0},
pages = {134-135},
booktitle = {IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
publisher = {IEEE},
isbn = {978-1-6654-9772-5},
}