A Power Efficiency Enhancements of a Multi-Bit Accelerator for Memory Prohibitive Deep Neural Networks

Suhas Shivapakash, Hardik Jain, Olaf Hellwich, Friedel Gerfers. A Power Efficiency Enhancements of a Multi-Bit Accelerator for Memory Prohibitive Deep Neural Networks. IEEE Open J. Circuits Syst., 2:156-169, 2021. [doi]

Abstract

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