Michael Shoniker, Oleg Oleynikov, Bruce F. Cockburn, Jie Han, Manish Rana, Witold Pedrycz. Automatic Selection of Process Corner Simulations for Faster Design Verification. IEEE Trans. on CAD of Integrated Circuits and Systems, 37(6):1312-1316, 2018. [doi]
@article{ShonikerOCHRP18,
title = {Automatic Selection of Process Corner Simulations for Faster Design Verification},
author = {Michael Shoniker and Oleg Oleynikov and Bruce F. Cockburn and Jie Han and Manish Rana and Witold Pedrycz},
year = {2018},
doi = {10.1109/TCAD.2017.2748027},
url = {https://doi.org/10.1109/TCAD.2017.2748027},
researchr = {https://researchr.org/publication/ShonikerOCHRP18},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {37},
number = {6},
pages = {1312-1316},
}