Debjit Sinha, Hai Zhou. Gate-size optimization under timing constraints for coupling-noise reduction. IEEE Trans. on CAD of Integrated Circuits and Systems, 25(6):1064-1074, 2006. [doi]
@article{SinhaZ06,
title = {Gate-size optimization under timing constraints for coupling-noise reduction},
author = {Debjit Sinha and Hai Zhou},
year = {2006},
doi = {10.1109/TCAD.2005.855932},
url = {http://doi.ieeecomputersociety.org/10.1109/TCAD.2005.855932},
tags = {optimization, constraints},
researchr = {https://researchr.org/publication/SinhaZ06},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {25},
number = {6},
pages = {1064-1074},
}