Design Methodology for Voltage-Scaled Clock Distribution Networks

Can Sitik, Weicheng Liu, Baris Taskin, Emre Salman. Design Methodology for Voltage-Scaled Clock Distribution Networks. IEEE Trans. VLSI Syst., 24(10):3080-3093, 2016. [doi]

Authors

Can Sitik

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Weicheng Liu

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Baris Taskin

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Emre Salman

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