Senthil Sivakumar, S. P. Joy Vasantha Rani. Efficient Design of ADC BIST with an Analog Ramp Signal Generation and Digital Error Estimation. Journal of Circuits, Systems, and Computers, 28(3):1950042, 2019. [doi]
@article{SivakumarR19,
title = {Efficient Design of ADC BIST with an Analog Ramp Signal Generation and Digital Error Estimation},
author = {Senthil Sivakumar and S. P. Joy Vasantha Rani},
year = {2019},
doi = {10.1142/S0218126619500427},
url = {https://doi.org/10.1142/S0218126619500427},
researchr = {https://researchr.org/publication/SivakumarR19},
cites = {0},
citedby = {0},
journal = {Journal of Circuits, Systems, and Computers},
volume = {28},
number = {3},
pages = {1950042},
}