A post-processing methodology to improve the automatic design of CMOS gates at layout-level

Gustavo H. Smaniotto, Regis Zanandrea, Maicon Schneider Cardoso, Renato Souza de Souza, Matheus T. Moreira, Felipe S. Marques, Leomar S. da Rosa. A post-processing methodology to improve the automatic design of CMOS gates at layout-level. In 24th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2017, Batumi, Georgia, December 5-8, 2017. pages 42-45, IEEE, 2017. [doi]

Authors

Gustavo H. Smaniotto

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Regis Zanandrea

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Maicon Schneider Cardoso

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Renato Souza de Souza

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Matheus T. Moreira

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Felipe S. Marques

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Leomar S. da Rosa

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