An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults

Jack Smith, Tian Xia, Charles E. Stroud. An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults. J. Electronic Testing, 22(3):239-253, 2006. [doi]

@article{SmithXS06,
  title = {An Automated BIST Architecture for Testing and Diagnosing FPGA Interconnect Faults},
  author = {Jack Smith and Tian Xia and Charles E. Stroud},
  year = {2006},
  doi = {10.1007/s10836-006-9319-7},
  url = {http://dx.doi.org/10.1007/s10836-006-9319-7},
  tags = {architecture, testing, e-science},
  researchr = {https://researchr.org/publication/SmithXS06},
  cites = {0},
  citedby = {0},
  journal = {J. Electronic Testing},
  volume = {22},
  number = {3},
  pages = {239-253},
}