Salita Sombatsiri, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai. On-chip Communication Buffer Architecture Optimization Considering Bus Width. In IEEE 6th International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2012, Fukushima, Japan, September 20-22, 2012. pages 29-36, IEEE Computer Society, 2012. [doi]
Abstract is missing.