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Daniel L. Stasiak, Farnaz Mounes-Toussi, Salvatore N. Storino. A 440-ps 64-bit adder in 1.5-V/0.18-/spl mu/m partially depleted SOI technology. J. Solid-State Circuits, 36(10):1546-1552, 2001. [doi]
Abstract is missing.