Ralf Stemmer, Maher Fakih. Towards Timing and Power Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication. In Daniel Große, Rolf Drechsler, editors, Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, MBMV 2017, Bremen, Germany, February 8-9, 2017. pages 115-116, Shaker Verlag, 2017.
@inproceedings{StemmerF17,
title = {Towards Timing and Power Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication},
author = {Ralf Stemmer and Maher Fakih},
year = {2017},
researchr = {https://researchr.org/publication/StemmerF17},
cites = {0},
citedby = {0},
pages = {115-116},
booktitle = {Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, MBMV 2017, Bremen, Germany, February 8-9, 2017},
editor = {Daniel Große and Rolf Drechsler},
publisher = {Shaker Verlag},
isbn = {978-3-8440-4996-1},
}