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Luca Sterpone. A New Timing Driven Placement Algorithm for Dependable Circuits on SRAM-based FPGAs. TRETS, 4(1):7, 2010. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Timing Driven Placement for Fault Tolerant Circuits Implemented on SRAM-Based FPGAsLuca Sterpone. arc 2009: 85-96 [doi] A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAsLuca Sterpone, Niccolò Battezzati. date 2010: 1231-1236 [doi]
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