Yu-Shih Su, Wing-Kai Hon, Cheng-Chih Yang, Shih-Chieh Chang, Yeong-Jar Chang. Clock Skew Minimization in Multi-Voltage Mode Designs Using Adjustable Delay Buffers. IEEE Trans. on CAD of Integrated Circuits and Systems, 29(12):1921-1930, 2010. [doi]
Abstract is missing.