A 90nm 8×16 FPGA Enhancing Speed and Yield Utilizing Within-Die Variations

Yuuri Sugihara, Manabu Kotani, Kazuya Katsuki, Kazutoshi Kobayashi, Hidetoshi Onodera. A 90nm 8×16 FPGA Enhancing Speed and Yield Utilizing Within-Die Variations. In Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007. pages 122-123, IEEE, 2007. [doi]

@inproceedings{SugiharaKKKO07,
  title = {A 90nm 8×16 FPGA Enhancing Speed and Yield Utilizing Within-Die Variations},
  author = {Yuuri Sugihara and Manabu Kotani and Kazuya Katsuki and Kazutoshi Kobayashi and Hidetoshi Onodera},
  year = {2007},
  doi = {10.1109/ASPDAC.2007.357971},
  url = {http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2007.357971},
  researchr = {https://researchr.org/publication/SugiharaKKKO07},
  cites = {0},
  citedby = {0},
  pages = {122-123},
  booktitle = {Proceedings of the 12th Conference on Asia South Pacific Design Automation, ASP-DAC 2007, Yokohama, Japan, January 23-26, 2007},
  publisher = {IEEE},
}