XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks

Xiaoyu Sun, Shihui Yin, Xiaochen Peng, Rui Liu, Jae-sun Seo, Shimeng Yu. XNOR-RRAM: A scalable and parallel resistive synaptic architecture for binary neural networks. In 2018 Design, Automation & Test in Europe Conference & Exhibition, DATE 2018, Dresden, Germany, March 19-23, 2018. pages 1423-1428, IEEE, 2018. [doi]

Authors

Xiaoyu Sun

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Shihui Yin

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Xiaochen Peng

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Rui Liu

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Jae-sun Seo

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Shimeng Yu

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