A Stable 2-Port SRAM Cell Design Against Simultaneously Read/Write-Disturbed Accesses

Toshikazu Suzuki, Hiroyuki Yamauchi, Yoshinobu Yamagami, Katsuji Satomi, Hironori Akamatsu. A Stable 2-Port SRAM Cell Design Against Simultaneously Read/Write-Disturbed Accesses. J. Solid-State Circuits, 43(9):2109-2119, 2008. [doi]

Abstract

Abstract is missing.