An Efficient Design of an FPGA-Based Multiplier Using LUT Merging Theorem - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Zarrin Tasnim Sworna, Mubin Ul Haque, Hafiz Md. Hasan Babu, Lafifa Jamal, Ashis Kumer Biswas. An Efficient Design of an FPGA-Based Multiplier Using LUT Merging Theorem. In 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017, Bochum, Germany, July 3-5, 2017. pages 116-121, IEEE, 2017. [doi]

This author has not been identified. Look up 'Zarrin Tasnim Sworna' in GoogleThis author has not been identified. Look up 'Mubin Ul Haque' in GoogleThis author has not been identified. Look up 'Hafiz Md. Hasan Babu' in GoogleThis author has not been identified. Look up 'Lafifa Jamal' in GoogleThis author has not been identified. Look up 'Ashis Kumer Biswas' in Google

runs on WebDSL