Zarrin Tasnim Sworna, Mubin Ul Haque, Hafiz Md. Hasan Babu, Lafifa Jamal, Ashis Kumer Biswas. An Efficient Design of an FPGA-Based Multiplier Using LUT Merging Theorem. In 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017, Bochum, Germany, July 3-5, 2017. pages 116-121, IEEE, 2017. [doi]
Abstract is missing.