Naofumi Takagi, Shuzo Yajima. On-Line Error-Detectable High-Speed Multiplier Using Redundant Binary Representation and Three-Rail Logic. IEEE Transactions on Computers, 36(11):1310-1317, 1987.
@article{TakagiY87,
title = {On-Line Error-Detectable High-Speed Multiplier Using Redundant Binary Representation and Three-Rail Logic},
author = {Naofumi Takagi and Shuzo Yajima},
year = {1987},
tags = {logic},
researchr = {https://researchr.org/publication/TakagiY87},
cites = {0},
citedby = {0},
journal = {IEEE Transactions on Computers},
volume = {36},
number = {11},
pages = {1310-1317},
}