Yasuhiro Takahashi, Toshikazu Sekine, Michio Yokoyama. VLSI Implementation of a 4 x 4-bit Multiplier in a Two Phase Drive Adiabatic Dynamic CMOS Logic. IEICE Transactions, 90-C(10):2002-2006, 2007. [doi]
@article{TakahashiSY07a,
title = {VLSI Implementation of a 4 x 4-bit Multiplier in a Two Phase Drive Adiabatic Dynamic CMOS Logic},
author = {Yasuhiro Takahashi and Toshikazu Sekine and Michio Yokoyama},
year = {2007},
doi = {10.1093/ietele/e90-c.10.2002},
url = {http://dx.doi.org/10.1093/ietele/e90-c.10.2002},
tags = {logic},
researchr = {https://researchr.org/publication/TakahashiSY07a},
cites = {0},
citedby = {0},
journal = {IEICE Transactions},
volume = {90-C},
number = {10},
pages = {2002-2006},
}