VLSI Implementation of a 4 x 4-bit Multiplier in a Two Phase Drive Adiabatic Dynamic CMOS Logic - researchr publication references

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Yasuhiro Takahashi, Toshikazu Sekine, Michio Yokoyama. VLSI Implementation of a 4 x 4-bit Multiplier in a Two Phase Drive Adiabatic Dynamic CMOS Logic. IEICE Transactions, 90-C(10):2002-2006, 2007. [doi]

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