High speed area reduced 64-bit static hybrid carry-lookahead/carry-select adder

Habib Ghasemizadeh Tamar, Akbar Ghasemizadeh Tamar, Khayrollah Hadidi, Abdollah Khoei, Pourya Hoseini. High speed area reduced 64-bit static hybrid carry-lookahead/carry-select adder. In 18th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2011, Beirut, Lebanon, December 11-14, 2011. pages 460-463, IEEE, 2011. [doi]

@inproceedings{TamarTHKH11,
  title = {High speed area reduced 64-bit static hybrid carry-lookahead/carry-select adder},
  author = {Habib Ghasemizadeh Tamar and Akbar Ghasemizadeh Tamar and Khayrollah Hadidi and Abdollah Khoei and Pourya Hoseini},
  year = {2011},
  doi = {10.1109/ICECS.2011.6122312},
  url = {http://dx.doi.org/10.1109/ICECS.2011.6122312},
  researchr = {https://researchr.org/publication/TamarTHKH11},
  cites = {0},
  citedby = {0},
  pages = {460-463},
  booktitle = {18th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2011, Beirut, Lebanon, December 11-14, 2011},
  publisher = {IEEE},
  isbn = {978-1-4577-1845-8},
}