Himanshu Thapliyal, Vishal Verma, Hamid R. Arabnia. A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs. In Hamid R. Arabnia, Mary Mehrnoosh Eshaghian-Wilner, editors, Proceedings of the 2006 International Conference on Computer Design & Conference on Computing in Nanotechnology, CDES 2006, Las Vegas, Nevada, USA, June 26-29, 2006. pages 36-38, CSREA Press, 2006.
@inproceedings{ThapliyalVA06,
title = {A Double Precision Floating Point Multiplier Suitably Designed for FPGAs and ASICs},
author = {Himanshu Thapliyal and Vishal Verma and Hamid R. Arabnia},
year = {2006},
researchr = {https://researchr.org/publication/ThapliyalVA06},
cites = {0},
citedby = {0},
pages = {36-38},
booktitle = {Proceedings of the 2006 International Conference on Computer Design & Conference on Computing in Nanotechnology, CDES 2006, Las Vegas, Nevada, USA, June 26-29, 2006},
editor = {Hamid R. Arabnia and Mary Mehrnoosh Eshaghian-Wilner},
publisher = {CSREA Press},
isbn = {1-60132-009-4},
}