Improving formal timing analysis of switched ethernet by exploiting FIFO scheduling

Daniel Thiele, Philip Axer, Rolf Ernst. Improving formal timing analysis of switched ethernet by exploiting FIFO scheduling. In Proceedings of the 52nd Annual Design Automation Conference, San Francisco, CA, USA, June 7-11, 2015. pages 41, ACM, 2015. [doi]

Abstract

Abstract is missing.