An Adaptively-Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 GigaHertz - researchr publication authors

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José A. Tierno, Sergey Rylov, Alexander Rylyakov, Montek Singh, Steven M. Nowick. An Adaptively-Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 GigaHertz. In 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002), 9-11 April 2002, Manchester, UK. pages 84, IEEE Computer Society, 2002. [doi]

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