Abstract is missing.
- Synchronous Interlocked PipelinesHans M. Jacobson, Prabhakar Kudva, Pradip Bose, Peter W. Cook, Stanley Schuster. 3-12 [doi]
- High-Speed QDI Asynchronous PipelinesRecep O. Ozdag, Peter A. Beerel. 13-22 [doi]
- Energy-Efficient PipelinesRajit Manohar, Clinton Kelly IV, John Teifel, David Fang, David Biermann. 23 [doi]
- A Negative-Overhead, Self-Timed PipelineMark R. Greenstreet, Brian D. Winters. 37-46 [doi]
- An Event Spacing ExperimentMark R. Greenstreet, Anthony Winstanley, Aurelien Garivier. 47 [doi]
- Clock Synchronization through Handshake SignallingJoep L. W. Kessels, Suk-Jin Kim, Ad M. G. Peeters, Paul Wielage. 59-68 [doi]
- Point to Point GALS InterconnectGeorge S. Taylor, Simon W. Moore, Robert D. Mullins, Peter Robinson. 69-75 [doi]
- A Dual-Mode Synchronous/Asynchronous CORDIC ProcessorEckhard Grass, Bodhisatya Sarker, Koushik Maharatna. 76-83 [doi]
- An Adaptively-Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 GigaHertzJosé A. Tierno, Sergey Rylov, Alexander Rylyakov, Montek Singh, Steven M. Nowick. 84 [doi]
- Probabilistic Timing Analysis of Asynchronous Systems with Moments of DelayRohan Angrish, Supratik Chakraborty. 99-108 [doi]
- Generation and Verification of Timing Constraints for Fine-Grain Pipelined Asynchronous Data-Path CircuitsMetehan Özcan, Masashi Imai, Takashi Nanya. 109-114 [doi]
- Relative Timing Based Verification of Timed Circuits and SystemsPeter A. Beerel, Ken S. Stevens, Hoshik Kim. 115 [doi]
- Asynchronous Circuit Synthesis by Direct Mapping: Interfacing to EnvironmentAlexandre V. Bystrov, Alexandre Yakovlev. 127-136 [doi]
- Design and Performance Analysis of Buffers: A Constructive ApproachRudolf H. Mak. 137-148 [doi]
- Adding Synchronous and LSSD Modes to Asynchronous CircuitsFrank te Beest, Kees van Berkel, Ad M. G. Peeters. 161-170 [doi]
- Testing of Asynchronous Designs by Inappropriate Means: Synchronous ApproachAmy Streich, Alex Kondratyev, Lief Sorensen. 171-180 [doi]
- A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous SystemsThomas Villiger, Stephan Oetiker, Frank K. Gürkaynak, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner. 181-189 [doi]
- On-Chip Structures for Timing Measurements and TestD. J. Kinniment, Oleh V. Maevsky, Gordon Russell, Alexandre Yakovlev, Alexandre V. Bystrov. 190 [doi]
- SPA - A Synthesisable Amulet Core for Smartcard pplicationsW. J. Bainbridge, Andrew Bardsley, Steve Temple, Jim D. Garside, P. A. Riocreux, Luis A. Plana. 201-210 [doi]
- Improving Smart Card Security Using Self-Timed CircuitsSimon W. Moore, Robert D. Mullins, Paul A. Cunningham, Ross J. Anderson, George S. Taylor. 211 [doi]