Alexandre V. Bystrov - researchr alias

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Viewing Publication 1 - 44 from 44

2013

Simulation Testing of a Real-Time Heuristic Scheduler with Automotive BenchmarksJames Docherty, Alexandre V. Bystrov, Alex Yakovlev. uksim 2013: 424-429 [doi]

2012

2011

Improving the Robustness of Self-timed SRAM to Variable VddsAbdullah Baz, Delong Shang, Fei Xia, Alexandre Yakovlev, Alexandre V. Bystrov. patmos 2011: 32-42 [doi]

Security Evaluation of Balanced 1-of- n CircuitsFrank P. Burns, Alexandre V. Bystrov, Albert Koelmans, Alexandre Yakovlev. tvlsi, 19(11):2135-2139, 2011. [doi]

2010

On-line testing of bundled-data asynchronous handshake protocolsSteffen Zeidler, Alexandre V. Bystrov, Milos Krstic, Rolf Kraemer. iolts 2010: 261-267 [doi]

2008

Phase-Encoding for On-Chip SignallingCrescenzo D'Alessandro, Delong Shang, Alexandre V. Bystrov, Alexandre Yakovlev, Oleg V. Maevsky. tcas, 55-I(2):535-545, 2008. [doi]

Modeling and verification of the SDL-specified communication protocols using high-level Petri netsV. A. Nepomniaschy, Victor S. Argirov, Dmitri M. Beloglazov, Alexandre V. Bystrov, Eugene A. Chetvertakov, Tatiana G. Churina. pcs, 34(6):330-340, 2008. [doi]

2007

Delay/Phase Regeneration CircuitsCrescenzo D Alessandro, Andrey Mokhov, Alexandre V. Bystrov, Alexandre Yakovlev. async 2007: 105-116 [doi]

A C-element Latch Scheme with Increased Transient Fault Tolerance for Asynchronous CircuitsK. T. Gardiner, Alexandre Yakovlev, Alexandre V. Bystrov. iolts 2007: 223-230 [doi]

Application of Modified Coloured Petri Nets to Modeling and Verification of SDL Specified Communication ProtocolsValery A. Nepomniaschy, Gennady I. Alekseev, Victor S. Argirov, Dmitri M. Beloglazov, Alexandre V. Bystrov, Eugene A. Chetvertakov, Tatiana G. Churina, Sergey P. Mylnikov, Ruslan M. Novikov. csr 2007: 303-314 [doi]

Registers for Phase Difference Based LogicDelong Shang, Alexandre Yakovlev, Albert Koelmans, Danil Sokolov, Alexandre V. Bystrov. tvlsi, 15(6):720-724, 2007. [doi]

Direct Mapping of Low-Latency Asynchronous Controllers From STGsDanil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev. tcad, 26(6):993-1009, 2007. [doi]

2006

2005

2004

2003

2002

Synthesis of Asynchronous Circuits with Predictable LatencyAlexandre V. Bystrov, Alexandre Yakovlev. iwls 2002: 239-243

Asynchronous Circuit Synthesis by Direct Mapping: Interfacing to EnvironmentAlexandre V. Bystrov, Alexandre Yakovlev. async 2002: 127-136 [doi]

Visualization of Partial Order Models in VLSI Design FlowAlexandre V. Bystrov, Maciej Koutny, Alexandre Yakovlev. date 2002: 1089 [doi]

On-Chip Structures for Timing Measurements and TestD. J. Kinniment, Oleh V. Maevsky, Gordon Russell, Alexandre Yakovlev, Alexandre V. Bystrov. async 2002: 190 [doi]

Synchronization circuit performanceDavid J. Kinniment, Alexandre V. Bystrov, Alex Yakovlev. jssc, 37(2):202-209, 2002. [doi]

Visualization of Coding Conflicts in Asynchronous Circuit DesignAgnes Madalinski, Alexandre V. Bystrov, Alexandre Yakovlev. iwls 2002: 155-160

Analysis of the oscillation problem in tri-flopsOleh V. Maevsky, D. J. Kinniment, Alexandre Yakovlev, Alexandre V. Bystrov. iscas 2002: 381-384 [doi]

2001

Verification of Estelle-Specified Communication Protocols Using High-Level Petri NetsV. A. Nepomniaschy, Gennady I. Alekseev, Alexandre V. Bystrov, Sergey P. Mylnikov, E. V. Okunishnikova, P. A. Chubarev, Tatiana G. Churina. pcs, 27(2):58-68, 2001. [doi]

2000

1999

Implementing Model Checking and Equivalence Checking for Time Petri Nets by the RT-MEC ToolAlexandre V. Bystrov, I. B. Verbistskaite. pact 1999: 194-199 [doi]

1995

Petri Net Modelling of Estelle-specified Communication ProtocolsV. A. Nepomniaschy, Gennady I. Alekseev, Alexandre V. Bystrov, Tatiana G. Churina, Sergey P. Mylnikov, E. V. Okunishnikova. pact 1995: 94-108

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Publications by 'Alexandre V. Bystrov'

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2013

2012

2011

2010

2008

2007

2006

2005

2004

2003

2002

2001

2000

1999

1995

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