Peter W. Cook - researchr alias

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Viewing Publication 1 - 12 from 12

2003

Dynamically Tuning Processor Resources with Adaptive ProcessingDavid H. Albonesi, Rajeev Balasubramonian, Steve Dropsho, Sandhya Dwarkadas, Eby G. Friedman, Michael C. Huang, Volkan Kursun, Grigorios Magklis, Michael L. Scott, Greg Semeraro, Pradip Bose, Alper Buyuktosunoglu, Peter W. Cook, Stanley Schuster. Computer, 36(12):49-58, 2003. [doi]

New optimal design strategies and analysis of ultra-low leakage circuits for nano-scale SOI technologyKoushik K. Das, Rajiv V. Joshi, Ching-Te Chuang, Peter W. Cook, Richard B. Brown. islped 2003: 168-171 [doi]

New digital circuit techniques for total standby leakage reduction in nano-scale SOI technologyKoushik K. Das, Rajiv V. Joshi, Ching-Te Chuang, Peter W. Cook, Richard B. Brown. esscirc 2003: 309-312 [doi]

Low-power synchronous-to-asynchronous- to-synchronous interlocked pipelined CMOS circuits operating at 3.3-4.5 GHzStanley Schuster, Peter W. Cook. jssc, 38(4):622-630, 2003. [doi]

2002

2001

A circuit level implementation of an adaptive issue queue for power-aware microprocessorsAlper Buyuktosunoglu, David H. Albonesi, Stanley Schuster, David Brooks, Pradip Bose, Peter W. Cook. glvlsi 2001: 73-78 [doi]

2000

1998

Measurement and modeling of on-chip transmission line effects in a 400 MHz microprocessorPhillip J. Restle, Keith A. Jenkins, Alina Deutsch, Peter W. Cook. jssc, 33(4):662-665, 1998. [doi]

1984

Constraint Solver for Generalized IC LayoutPeter W. Cook. ibmrd, 28(5):581-589, 1984.

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