Benjamas Tongprasit, Kiyoto Ito, Tadashi Shibata. A computational digital-pixel-sensor VLSI featuring block-readout architecture for pixel-parallel rank-order filtering. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 2389-2392, IEEE, 2005. [doi]
@inproceedings{TongprasitIS05,
title = {A computational digital-pixel-sensor VLSI featuring block-readout architecture for pixel-parallel rank-order filtering},
author = {Benjamas Tongprasit and Kiyoto Ito and Tadashi Shibata},
year = {2005},
doi = {10.1109/ISCAS.2005.1465106},
url = {http://dx.doi.org/10.1109/ISCAS.2005.1465106},
tags = {architecture},
researchr = {https://researchr.org/publication/TongprasitIS05},
cites = {0},
citedby = {0},
pages = {2389-2392},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan},
publisher = {IEEE},
}