Shadi Traboulsi, Michael Meitinger, Rainer Ohlendorf, Andreas Herkersdorf. An Efficient Hardware Architecture for Packet Re-sequencing in Network Processors MPSoCs. In Antonio Núñez, Pedro P. Carballo, editors, 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, 27-29 August 2009, Patras, Greece. pages 11-18, IEEE Computer Society, 2009. [doi]
@inproceedings{TraboulsiMOH09,
title = {An Efficient Hardware Architecture for Packet Re-sequencing in Network Processors MPSoCs},
author = {Shadi Traboulsi and Michael Meitinger and Rainer Ohlendorf and Andreas Herkersdorf},
year = {2009},
doi = {10.1109/DSD.2009.194},
url = {http://doi.ieeecomputersociety.org/10.1109/DSD.2009.194},
tags = {architecture},
researchr = {https://researchr.org/publication/TraboulsiMOH09},
cites = {0},
citedby = {0},
pages = {11-18},
booktitle = {12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, 27-29 August 2009, Patras, Greece},
editor = {Antonio Núñez and Pedro P. Carballo},
publisher = {IEEE Computer Society},
isbn = {978-0-7695-3782-5},
}