A Wide-Range All-Digital Delay-Locked Loop for DDR1-DDR5 Applications

Chih-Wei Tsai, Yu-Ting Chiu, Yo-Hao Tu, Kuo-Hsing Cheng. A Wide-Range All-Digital Delay-Locked Loop for DDR1-DDR5 Applications. IEEE Trans. VLSI Syst., 29(10):1720-1729, 2021. [doi]

@article{TsaiCTC21,
  title = {A Wide-Range All-Digital Delay-Locked Loop for DDR1-DDR5 Applications},
  author = {Chih-Wei Tsai and Yu-Ting Chiu and Yo-Hao Tu and Kuo-Hsing Cheng},
  year = {2021},
  doi = {10.1109/TVLSI.2021.3098171},
  url = {https://doi.org/10.1109/TVLSI.2021.3098171},
  researchr = {https://researchr.org/publication/TsaiCTC21},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {29},
  number = {10},
  pages = {1720-1729},
}