A 1 V Input, 3 V-to-6 V Output, 58%-Efficient Integrated Charge Pump With a Hybrid Topology for Area Reduction and an Improved Efficiency by Using Parasitics

Jen-Huan Tsai, Sheng-An Ko, Chia-Wei Wang, Yang-Chi Yen, Hui-Huan Wang, Po-Chiun Huang, Po-Hsiang Lan, Meng-Hung Shen. A 1 V Input, 3 V-to-6 V Output, 58%-Efficient Integrated Charge Pump With a Hybrid Topology for Area Reduction and an Improved Efficiency by Using Parasitics. J. Solid-State Circuits, 50(11):2533-2548, 2015. [doi]

Abstract

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