Po-Chang Tsai, Sying-Jyan Wang. Multi-Mode Segmented Scan Architecture with Layout-Aware Scan Chain Routing for Test Data and Test Time Reduction. In 15th Asian Test Symposium, ATS 2006, Fukuoka, Japan, November 20-23, 2006. pages 225-230, IEEE, 2006. [doi]
@inproceedings{TsaiW06-3,
title = {Multi-Mode Segmented Scan Architecture with Layout-Aware Scan Chain Routing for Test Data and Test Time Reduction},
author = {Po-Chang Tsai and Sying-Jyan Wang},
year = {2006},
doi = {10.1109/ATS.2006.261024},
url = {https://doi.org/10.1109/ATS.2006.261024},
researchr = {https://researchr.org/publication/TsaiW06-3},
cites = {0},
citedby = {0},
pages = {225-230},
booktitle = {15th Asian Test Symposium, ATS 2006, Fukuoka, Japan, November 20-23, 2006},
publisher = {IEEE},
isbn = {0-7695-2628-4},
}