Through-Silicon Via Planning in 3-D Floorplanning

Ming-Chao Tsai, Ting-Chi Wang, Ting Ting Hwang. Through-Silicon Via Planning in 3-D Floorplanning. IEEE Trans. VLSI Syst., 19(8):1448-1457, 2011. [doi]

@article{TsaiWH11,
  title = {Through-Silicon Via Planning in 3-D Floorplanning},
  author = {Ming-Chao Tsai and Ting-Chi Wang and Ting Ting Hwang},
  year = {2011},
  doi = {10.1109/TVLSI.2010.2050012},
  url = {http://dx.doi.org/10.1109/TVLSI.2010.2050012},
  researchr = {https://researchr.org/publication/TsaiWH11},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {19},
  number = {8},
  pages = {1448-1457},
}