Cheng-Hsueh Tsai, Zhiwei Zong, Federico Pepe, Giovanni Mangraviti, Jan Craninckx, Piet Wambacq. Analysis of a 28-nm CMOS Fast-Lock Bang-Bang Digital PLL With 220-fs RMS Jitter for Millimeter-Wave Communication. J. Solid-State Circuits, 55(7):1854-1863, 2020. [doi]
@article{TsaiZPMCW20,
title = {Analysis of a 28-nm CMOS Fast-Lock Bang-Bang Digital PLL With 220-fs RMS Jitter for Millimeter-Wave Communication},
author = {Cheng-Hsueh Tsai and Zhiwei Zong and Federico Pepe and Giovanni Mangraviti and Jan Craninckx and Piet Wambacq},
year = {2020},
doi = {10.1109/JSSC.2020.2993717},
url = {https://doi.org/10.1109/JSSC.2020.2993717},
researchr = {https://researchr.org/publication/TsaiZPMCW20},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {55},
number = {7},
pages = {1854-1863},
}