Cheng-Hsueh Tsai, Zhiwei Zong, Federico Pepe, Giovanni Mangraviti, Jan Craninckx, Piet Wambacq. Analysis of a 28-nm CMOS Fast-Lock Bang-Bang Digital PLL With 220-fs RMS Jitter for Millimeter-Wave Communication. J. Solid-State Circuits, 55(7):1854-1863, 2020. [doi]
Abstract is missing.