Chiou-Kou Tung, Yu-Cherng Hung, Shao-Hui Shieh, Guo-Shing Huang. A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System. In Patrick Girard, Andrzej Krasniewski, Elena Gramatová, Adam Pawlak, Tomasz Garbolino, editors, Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), Kraków, Poland, April 11-13, 2007. pages 199-202, IEEE Computer Society, 2007.
@inproceedings{TungHSH07,
title = {A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System},
author = {Chiou-Kou Tung and Yu-Cherng Hung and Shao-Hui Shieh and Guo-Shing Huang},
year = {2007},
researchr = {https://researchr.org/publication/TungHSH07},
cites = {0},
citedby = {0},
pages = {199-202},
booktitle = {Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), Kraków, Poland, April 11-13, 2007},
editor = {Patrick Girard and Andrzej Krasniewski and Elena Gramatová and Adam Pawlak and Tomasz Garbolino},
publisher = {IEEE Computer Society},
isbn = {1-4244-1161-0},
}