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A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System

Chiou-Kou Tung, Yu-Cherng Hung, Shao-Hui Shieh, Guo-Shing Huang. A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System. In Patrick Girard, Andrzej Krasniewski, Elena Gramatová, Adam Pawlak, Tomasz Garbolino, editors, Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), Kraków, Poland, April 11-13, 2007. pages 199-202, IEEE Computer Society, 2007.

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