Sriram R. Vangal, Jason Howard, Gregory Ruhl, Saurabh Dighe, Howard Wilson, James Tschanz, David Finan, Priya Iyer, Arvind Singh, Tiju Jacob, Shailendra Jain, Sriram Venkataraman, Yatin Hoskote, Nitin Borkar. An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS. In 2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007. pages 98-589, IEEE, 2007. [doi]
@inproceedings{VangalHRDWTFISJJVHB07,
title = {An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS},
author = {Sriram R. Vangal and Jason Howard and Gregory Ruhl and Saurabh Dighe and Howard Wilson and James Tschanz and David Finan and Priya Iyer and Arvind Singh and Tiju Jacob and Shailendra Jain and Sriram Venkataraman and Yatin Hoskote and Nitin Borkar},
year = {2007},
doi = {10.1109/ISSCC.2007.373606},
url = {http://dx.doi.org/10.1109/ISSCC.2007.373606},
researchr = {https://researchr.org/publication/VangalHRDWTFISJJVHB07},
cites = {0},
citedby = {0},
pages = {98-589},
booktitle = {2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007},
publisher = {IEEE},
isbn = {1-4244-0853-9},
}