Test Generation for Analog Circuits Using Partial Numerical Simulation - researchr publication authors

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Pramodchandran N. Variyam, Junwei Hou, Abhijit Chatterjee. Test Generation for Analog Circuits Using Partial Numerical Simulation. In 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India. pages 597-602, IEEE Computer Society, 1999. [doi]

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