Shobha Vasudevan, Vinod Viswanath, Robert W. Sumners, Jacob A. Abraham. Automatic Verification of Arithmetic Circuits in RTL Using Stepwise Refinement of Term Rewriting Systems. IEEE Transactions on Computers, 56(10):1401-1414, 2007. [doi]
@article{VasudevanVSA07,
title = {Automatic Verification of Arithmetic Circuits in RTL Using Stepwise Refinement of Term Rewriting Systems},
author = {Shobha Vasudevan and Vinod Viswanath and Robert W. Sumners and Jacob A. Abraham},
year = {2007},
doi = {10.1109/TC.2007.1073},
url = {http://doi.ieeecomputersociety.org/10.1109/TC.2007.1073},
tags = {refinement, term rewriting, graph-rewriting, rewriting},
researchr = {https://researchr.org/publication/VasudevanVSA07},
cites = {0},
citedby = {0},
journal = {IEEE Transactions on Computers},
volume = {56},
number = {10},
pages = {1401-1414},
}