Vinod Viswanath - researchr alias

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Viewing Publication 1 - 16 from 16

2024

DFT Static Verification using Early RTL Exploration and Debug for Mobile SoC and Edge AI ApplicationsVinod Viswanath, Kanad Chakraborty. vlsid 2024: 293-299 [doi]

2019

Closing the Verification Gap with Static Sign-offPranav Ashar, Vinod Viswanath. isqed 2019: 343-347 [doi]

2017

Failures and verification solutions related to untimed paths in SOCsPranav Ashar, Vikas Sachdeva, Vinod Viswanath. isqed 2017: 460-465 [doi]

2016

WelcomeBrian Cline, Saibal Mukhopadhyay, Peter J. Wright, Hai Li, Vinod Viswanath, Paul Wesling, Gang Qu, Ali Iranmanesh. isqed 2016: [doi]

2013

On a rewriting strategy for dynamically managing power constraints and power dissipation in SoCsVinod Viswanath, Rajeev Muralidhar, Harinarayanan Seshadri, Jacob A. Abraham. isqed 2013: 128-134 [doi]

2012

Power Management Methods: From Specification and Modeling, to Techniques and VerificationVinod Viswanath, Rajeev Muralidhar, Harinarayanan Seshadri, Ananth S. Narayan. jolpe, 8(4):353-377, 2012. [doi]

Automatic and Correct Register Transfer Level Annotations for Low Power Microprocessor DesignVinod Viswanath, Jacob A. Abraham. jolpe, 8(4):424-439, 2012. [doi]

2009

Dedicated Rewriting: Automatic Verification of Low Power Transformations in Register Transfer LevelVinod Viswanath, Shobha Vasudevan, Jacob A. Abraham. jolpe, 5(3):339-353, 2009. [doi]

Dedicated Rewriting: Automatic Verification of Low Power Transformations in RTLVinod Viswanath, Shobha Vasudevan, Jacob A. Abraham. vlsid 2009: 77-82 [doi]

2008

Sequential equivalence checking between system level and RTL descriptionsShobha Vasudevan, Vinod Viswanath, Jacob A. Abraham, Jiajin Tu. dafes, 12(4):377-396, 2008. [doi]

2007

Automatic Verification of Arithmetic Circuits in RTL Using Stepwise Refinement of Term Rewriting SystemsShobha Vasudevan, Vinod Viswanath, Robert W. Sumners, Jacob A. Abraham. TC, 56(10):1401-1414, 2007. [doi]

Efficient Microprocessor Verification using Antecedent Conditioned SlicingShobha Vasudevan, Vinod Viswanath, Jacob A. Abraham. vlsid 2007: 43-49 [doi]

2006

Automatic decomposition for sequential equivalence checking of system level and RTL descriptionsShobha Vasudevan, Jacob A. Abraham, Vinod Viswanath, Jiajin Tu. memocode 2006: 71-80 [doi]

Automatic insertion of low power annotations in RTL for pipelined microprocessorsVinod Viswanath, Jacob A. Abraham, Warren A. Hunt Jr.. date 2006: 496-501 [doi]

2004

Multi-log Processor - Towards Scalable Event-Driven MultiprocessorsVinod Viswanath. dsdm 2004: 279-286 [doi]

1999

The Ultrascalar Processor-An Asymptotically Scalable Superscalar MicroarchitectureDana S. Henry, Bradley C. Kuszmaul, Vinod Viswanath. arvlsi 1999: 256-275 [doi]

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