Clock tree layout design for reduced delay uncertainty

Dimitrios Velenis, Marios C. Papaefthymiou, Eby G. Friedman. Clock tree layout design for reduced delay uncertainty. In Proceedings 2004 IEEE International SOC Conference, September 12-15, 2004, Hilton Santa Clara, CA, USA. pages 179-180, IEEE, 2004. [doi]

Abstract

Abstract is missing.