A 65nm 8T Sub-Vt SRAM Employing Sense-Amplifier Redundancy - researchr publication authors

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Naveen Verma, Anantha P. Chandrakasan. A 65nm 8T Sub-Vt SRAM Employing Sense-Amplifier Redundancy. In 2007 IEEE International Solid-State Circuits Conference, ISSCC 2007, Digest of Technical Papers, San Francisco, CA, USA, February 11-15, 2007. pages 328-606, IEEE, 2007. [doi]

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