Efficient floating-point representation for balanced codes for FPGA devices - researchr publication authors

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Julio Villalba, Javier Hormigo, Francisco Corbera, Mario A. González, Emilio L. Zapata. Efficient floating-point representation for balanced codes for FPGA devices. In 2013 IEEE 31st International Conference on Computer Design, ICCD 2013, Asheville, NC, USA, October 6-9, 2013. pages 272-277, IEEE, 2013. [doi]

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