Efficient floating-point representation for balanced codes for FPGA devices

Julio Villalba, Javier Hormigo, Francisco Corbera, Mario A. González, Emilio L. Zapata. Efficient floating-point representation for balanced codes for FPGA devices. In 2013 IEEE 31st International Conference on Computer Design, ICCD 2013, Asheville, NC, USA, October 6-9, 2013. pages 272-277, IEEE, 2013. [doi]

@inproceedings{VillalbaHCGZ13,
  title = {Efficient floating-point representation for balanced codes for FPGA devices},
  author = {Julio Villalba and Javier Hormigo and Francisco Corbera and Mario A. González and Emilio L. Zapata},
  year = {2013},
  doi = {10.1109/ICCD.2013.6657053},
  url = {http://dx.doi.org/10.1109/ICCD.2013.6657053},
  researchr = {https://researchr.org/publication/VillalbaHCGZ13},
  cites = {0},
  citedby = {0},
  pages = {272-277},
  booktitle = {2013 IEEE 31st International Conference on Computer Design, ICCD 2013, Asheville, NC, USA, October 6-9, 2013},
  publisher = {IEEE},
}